HD64F3028F25 Datasheet, PDF (296/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
Bits 7 to 4 are reserved. They are fixed at 1, and cannot be modified.
Bit
7
6
5
4
3
2
1
0
—
—
—
— P5₃DDR P5₂DDR P5₁DDR P5₀DDR
Modes ^{Initial value 1}
1
1
1
1
1
1
1
1 to 4 _{Read/Write —}
—
—
—
—
—
—
—
Modes ^{Initial value 1}
1
1
1
0
0
0
0
5 to 7 _{Read/Write —}
—
—
—
W
W
W
W
Reserved bits
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P5DDR values are fixed at 1.
Port 5 functions as an address bus.
Modes 5 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 5 is an input
port. A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set to 1, and
an input port if this bit is cleared to 0.
Mode 6 and 7 (Single-Chip Mode): Port 5 functions as an input/output port. A pin in port 5
becomes an output port if the corresponding P5DDR bit is set to 1, and an input port if this bit is
cleared to 0.
In modes 1 to 4, P5DDR bits are always read as 1, and cannot be modified.
In modes 5 to 7, P5DDR is a write-only register. Its value cannot be read. All bits return 1 when
read.
P5DDR is initialized to H'FF in modes 1 to 4, and to H'F0 in modes 5 to 7, by a reset and in
hardware standby mode. In software standby mode it retains its previous setting. Therefore, if a
transition is made to software standby mode while port 5 is functioning as an input/output port and
a P5DDR bit is set to 1, the corresponding pin maintains its output state.
Rev. 2.00, 09/03, page 264 of 890