HD64F3028F25 Datasheet, PDF (284/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

P1DDR is initialized to H'FF in modes 1 to 4, and to H'00 in modes 5 to 7, by a reset and in
hardware standby mode. In software standby mode it retains its previous setting. Therefore, if a
transition is made to software standby mode while port 1 is functioning as an input/output port and
a P1DDR bit is set to 1, the corresponding pin maintains its output state.
Port 1 Data Register (P1DR): P1DR is an 8-bit readable/writable register that stores port 1
output data. When port 1 functions as an output port, the value of this register is output. When
this register is read, the pin logic level is read for bits for which the P1DDR setting is 0, and the
P1DR value is read for bits for which the P1DDR setting is 1.
Bit
Initial value
Read/Write
7
P1₇
0
R/W
6
P1₆
0
R/W
5
P1₅
0
R/W
4
P1₄
0
R/W
3
P1₃
0
R/W
2
P1₂
0
R/W
1
P1₁
0
R/W
0
P1₀
0
R/W
Port 1 data 7 to 0
These bits store data for port 1 pins
P1DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 2.00, 09/03, page 252 of 890