HD64F3028F25 Datasheet, PDF (34/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Table 1.1
Feature
CPU
Features
Description
Upward-compatible with the H8/300 CPU at the object-code level
General-register machine
• Sixteen 16-bit general registers
(also usable as sixteen 8-bit registers or eight 32-bit registers)
High-speed operation
• Maximum clock rate: 25 MHz
• Add/subtract: 80 ns
• Multiply/divide: 560 ns
16-Mbyte address space
Instruction features
• 8/16/32-bit data transfer, arithmetic, and logic instructions
• Signed and unsigned multiply instructions (8 bits x 8 bits, 16 bits x 16 bits)
• Signed and unsigned divide instructions (16 bits ÷ 8 bits, 32 bits ÷ 16 bits)
• Bit accumulator function
• Bit manipulation instructions with register-indirect specification of bit
positions
Memory
H8/3028 Group
• ROM: 384 kbytes
• RAM: 16 kbytes
Interrupt
controller
• Seven external interrupt pins: NMI, IRQ0 to IRQ5
• 36 internal interrupts
• Three selectable interrupt priority levels
Rev. 2.00, 09/03, page 2 of 890