HD64F3028F25 Datasheet, PDF (15/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Item
Table 21.5 Control
Signal Timing
Page
653
Revision (See Manual for Details)
Conditions amended
Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to
AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range
specifications)
Table amended
RESO output delay time
tRESO
—
100 ns
Table 21.6 Bus Timing 654,
655
Conditions amended
Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to
AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range
specifications)
Table amended
RAS precharge tRP 1.5 tcyc – 25 —
time
ns Figure 21.17 to
figure 21.19
CAS precharge tCP 0.5 tcyc – 15 —
ns
time
Row address hold tRAH 0.5 tcyc – 15 —
ns
time
Signal rise time tSR —
(all input pins
except EXTAL)
Signal fall time
tSF
—
(all input pins
except EXTAL)
100 ns Figure 21.28
100 ns
Table 21.7 Timing of 656
On-Chip Supporting
Modules
Conditions amended
Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to
AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range
specifications)
Rev. 2.00, 09/03, page xiii of xxx