HD64F3028F25 Datasheet, PDF (204/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

When software standby mode is used, the BRLE bit should be cleared to 0 in BRCR before
executing the SLEEP instruction.
Similar contention in a transition to self-refresh mode may prevent dependable strobe
waveform output. This can also be avoided by clearing the BRLW bit to 0 in BRCR.
• Immediately after self-refreshing is cleared, external bus release is possible during a given
period until the start of a CPU cycle. Attention must be paid to the RAS state to ensure that
the specification for the RAS precharge time immediately after self-refreshing is met.
External bus released
Refresh cycle
CPU cycle
Refresh cycle
φ
RFSH
Refresh
request
BACK
Figure 6.35 Bus-Released State and Refresh Cycles
φ
BREQ
BACK
Address bus
Software standby mode
Strobe
Figure 6.36 Bus-Released State and Software Standby Mode
Rev. 2.00, 09/03, page 172 of 890