HD64F3028F25 Datasheet, PDF (806/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

EBR (EBR2)—Erase Block Register 2
H'EE033
Flash Memory
Bit
7
—
Modes 1 to Initial value
0
4, and 6
Read/Write
R
Modes 5
and 7
Initial value
0
Read/Write R/W
6
5
4
3
2
—
EB13 EB12 EB11 EB10
0
0
0
0
0
R
R
R
R
R
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
1
0
EB9 EB8
0
0
R
R
0
0
R/W R/W
Block 13 to 8
0 Block EB13 to EB8 is not selected (Initial value)
1 Block EB13 to EB8 is selected
Notes: 1. When not erasing, clear EBR to H'00.
A value of 1 cannot be set in this register in mode 6.
2. This register is used only by the flash memory version and do not exist in the mask ROM
version. In the mask ROM version reading these addresses always returns a value of 1,
and it is not possible to write to them.
P2PCR—Port 2 Input Pull-Up Control Register
H'EE03C
Port 2
Bit
7
6
5
4
3
2
1
0
P27PCR P26PCR P25PCR P24PCR P23PCR P22PCR P21PCR P20PCR
Initial value
0
Read/Write R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
0
R/W R/W
Port 2 input pull-up control 7 to 0
0 Input pull-up transistor is off
1 Input pull-up transistor is on
Note: Valid when the corresponding P2DDR bit is cleared to 0
(designating generic input).
Rev. 2.00, 09/03, page 774 of 890