HD64F3028F25 Datasheet, PDF (42/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Type
DRAM
interface
Symbol
RFSH
CS2 to CS5
DMA
controller
(DMAC)
16-bit timer
RD
HWR
UCAS
LWR
LCAS
DREQ1,
DREQ0
TEND1,
TEND0
TCLKD to
TCLKA
TIOCA2 to
TIOCA0
TIOCB2 to
TIOCB0
8-bit timer
TMO0,
TMO2
TMIO1,
TMIO3
Program-
mable
timing
pattern
controller
(TPC)
Serial com-
munication
interface
(SCI)
TCLKD to
TCLKA
TP15 to TP0
TxD2 to
TxD0
RxD2 to
RxD0
SCK2 to
SCK0
Pin No.
FP-100B
TFP-100B
87
89, 88,
5, 4
70
71
6
72
7
5, 3
I/O
Output
Output
Output
Output
Output
Input
94, 93
Output
96 to 93 Input
99, 97, 95 Input/
output
100, 98,
96
Input/
output
2, 4
Output
3, 5
Input/
output
96 to 93 Input
9 to 2,
Output
100 to 93
8, 13, 12 Output
9, 15, 14 Input
7, 17, 16
Input/
output
Name and Function
Refresh: Indicates a refresh cycle
Row address strobe RAS: Row address strobe
signal for DRAM
Write enable WE: Write enable signal for DRAM
Upper column address strobe UCAS: Column
address strobe signal for DRAM
Lower column address strobe LCAS: Column
address strobe signal for DRAM
DMA request 1 and 0: DMAC activation
requests
Transfer end 1 and 0: These signals indicate
that the DMAC has ended a data transfer
Clock input D to A: External clock inputs
Input capture/output compare A2 to A0:
GRA2 to GRA0 output compare or input capture,
or PWM output
Input capture/output compare B2 to B0:
GRB2 to GRB0 output compare or input capture,
or PWM output
Compare match output: Compare match
output pins
Input capture input/compare match output:
Input capture input or compare match output
pins
Counter external clock input: These pins input
an external clock to the counters.
TPC output 15 to 0: Pulse output
Transmit data (channels 0, 1, 2): SCI data
output
Receive data (channels 0, 1, 2): SCI data input
Serial clock (channels 0, 1, 2): SCI clock
input/output
Rev. 2.00, 09/03, page 10 of 890