HD64F3028F25 Datasheet, PDF (246/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Table 7.7 Register Functions in Idle Mode
Function
Register
Activated by
SCI 0 Receive-
Data-Full
Other
Interrupt
Activation
23
MAR
0
Destination
address
register
Source
address
register
23
All 1s
7
0
Source
address
IOAR _register
Destination
address
register
15
0 ^{Transfer counter}
ETCR
Legend
MAR: Memory address register
IOAR: I/O address register
ETCR: Execute transfer count register
Initial Setting
Destination or
source address
Source or
destination
address
Number of
transfers
Operation
Held fixed
Held fixed
Decremented
once per
transfer until
H'0000 is
reached and
transfer ends
MAR and IOAR specify the source and destination addresses. MAR specifies a 24-bit source or
destination address. IOAR specifies the lower 8 bits of a fixed address. The upper 16 bits are all
1s. MAR and IOAR are not incremented or decremented.
Figure 7.4 illustrates how idle mode operates.
MAR
Transfer
1 byte or word is
transferred per request
Figure 7.4 Operation in Idle Mode
IOAR
Rev. 2.00, 09/03, page 214 of 890