HD64F3028F25 Datasheet, PDF (667/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

20.2 Register Configuration
The H8/3028 Group has a system control register (SYSCR) that controls the power-down state,
and module standby control registers H (MSTCRH) and L (MSTCRL) that control the module
standby function. Table 20.2 summarizes these registers.
Table 20.2 Control Register
Address^* Name
Abbreviation R/W
H'EE012 System control register
SYSCR
R/W
H'EE01C Module standby control register H MSTCRH
R/W
H'EE01D Module standby control register L
MSTCRL
R/W
Note: * Lower 20 bits of the address in advanced mode.
Initial Value
H'09
H'78
H'00
20.2.1 System Control Register (SYSCR)
Bit
Initial value
Read/Write
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
2
1
0
UE NMIEG SSOE RAME
1
0
0
1
R/W
R/W
R/W
R/W
RAM enable
Software standby
output port enable
NMI edge select
User bit enable
Standby timer select 2 to 0
These bits select the
waiting time of the CPU
and peripheral functions
Software standby
Enables transition to
software standby mode
SYSCR is an 8-bit readable/writable register. Bit 7 (SSBY), bits 6 to 4 (STS2 to STS0), and bit 1
(SSOE) control the power-down state. For information on the other SYSCR bits, see section 3.3,
System Control Register (SYSCR).
Rev. 2.00, 09/03, page 635 of 890