HD64F3028F25 Datasheet, PDF (669/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

20.2.2 Module Standby Control Register H (MSTCRH)
MSTCRH is an 8-bit readable/writable register that controls output of the system clock (φ). It also
controls the module standby function, which places individual on-chip supporting modules in the
standby state. Module standby can be designated for the SCI0, SCI1, SCI2.
Bit
7
6
5
4
PSTOP —
—
—
Initial value
0
1
1
1
Read/Write
R/W
—
—
—
Reserved bit
φ clock stop
Enables or disables
output of the system clock
3
2
1
0
— MSTPH2 MSTPH1 MSTPH0
1
0
0
0
—
R/W
R/W
R/W
Module standby H2 to 0
These bits select modules
to be placed in standby
MSTCRH is initialized to H'78 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—φ Clock Stop (PSTOP): Enables or disables output of the system clock (φ).
Bit 1
PSTOP
0
1
Description
System clock output is enabled
System clock output is disabled
(Initial value)
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 1.
Bit 2—Module Standby H2 (MSTPH2): Selects whether to place the SCI2 in standby.
Bit 2
MSTPH2
0
1
Description
SCI2 operates normally
SCI2 is in standby state
(Initial value)
Bit 1—Module Standby H1 (MSTPH1): Selects whether to place the SCI1 in standby.
Rev. 2.00, 09/03, page 637 of 890