HD64F3028F25 Datasheet, PDF (369/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

9.3 CPU Interface
9.3.1 16-Bit Accessible Registers
The timer counters (16TCNTs), general registers A and B (GRAs and GRBs) are 16-bit registers,
and are linked to the CPU by an internal 16-bit data bus. These registers can be written or read a
word at a time, or a byte at a time.
Figures 9.4 and 9.5 show examples of word read/write access to a timer counter (16TCNT).
Figures 9.6 to 9.9 show examples of byte read/write access to 16TCNTH and 16TCNTL.
On-chip data bus
H
CPU L
Bus interface
H
L
Module
data bus
16TCNTH 16TCNTL
Figure 9.4 16TCNT Access Operation [CPU → 16TCNT (Word)]
On-chip data bus
H
CPU L
Bus interface
H
L
Module
data bus
16TCNTH 16TCNTL
Figure 9.5 Access to Timer Counter (CPU Reads 16TCNT, Word)
Rev. 2.00, 09/03, page 337 of 890