HD64F3028F25 Datasheet, PDF (120/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Interrupt Priority Register B (IPRB): IPRB is an 8-bit readable/writable register in which
interrupt priority levels can be set.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
IPRB7 IPRB6 IPRB5 — IPRB3 IPRB2 IPRB1 —
0
0
0
0
0
0
0
0
R/W
R/W R/W
R/W R/W R/W
R/W R/W
Reserved bit
Priority level B1
Selects the priority level
of SCI channel 2 interrupt
requests
Priority level B2
Selects the priority level of
SCI channel 1 interrupt requests
Priority level B3
Selects the priority level of SCI
channel 0 interrupt requests
Reserved bit
Priority level B5
Selects the priority level of DMAC
interrupt requests (channels 0 and 1)
Priority level B6
Selects the priority level of 8-bit timer channel 2, 3 interrupt requests
Priority level B7
Selects the priority level of 8-bit timer channel 0, 1 interrupt requests
IPRB is initialized to H'00 by a reset and in hardware standby mode.
Rev. 2.00, 09/03, page 88 of 890