HD64F3028F25 Datasheet, PDF (660/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

19.2.2 External Clock Input
Circuit Configuration: An external clock signal can be input as shown in the examples in figure
19.5. If the XTAL pin is left open, the stray capacitance should not exceed 10 pF. If the stray
capacitance at the XTAL pin exceeds 10 pF in configuration a, use the connection shown in
configuration b instead, and hold the external clock high in standby mode.
EXTAL
XTAL
Open
a. XTAL pin left open
External clock input
EXTAL
XTAL
External clock input
b. Complementary clock input at XTAL pin
Figure 19.5 External Clock Input (Examples)
External Clock: The external clock frequency should be equal to the system clock frequency when
not divided by the on-chip frequency divider. Table 19.3 shows the clock timing, figure 19.6
shows the external clock input timing, and figure 19.7 shows the external clock output settling
delay timing. When the appropriate external clock is input via the EXTAL pin, its waveform is
corrected by the on-chip oscillator and duty adjustment circuit.
When the appropriate external clock is input via the EXTAL pin, its waveform is corrected by the
on-chip oscillator and duty adjustment circuit. The resulting stable clock is output to external
devices after the external clock settling time (t_DEXT) has passed after the clock input. The system
must remain reset with the reset signal low during t_DEXT, while the clock output is unstable.
Rev. 2.00, 09/03, page 628 of 890