HD64F3028F25 Datasheet, PDF (395/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Contention between 16TCNT Byte Write and Increment: If an increment pulse occurs in the
T₂ or T₃ state of a 16TCNT byte write cycle, writing takes priority and 16TCNT is not
incremented. The byte data for which a write was not performed is not incremented, and retains its
pre-write value. See figure 9.39, which shows an increment pulse occurring in the T₂ state of a
byte write to 16TCNTH.
16TCNTH byte write cycle
T₁
T₂
T₃
φ
Address bus
16TCNTH address
Internal write signal
16TCNT input clock
16TCNTH
16TCNTL
N
M
16TCNT write data
X
X+1
X
Figure 9.39 Contention between 16TCNT Byte Write and Increment
Rev. 2.00, 09/03, page 363 of 890