HD64F3028F25 Datasheet, PDF (840/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

TCSR—Timer Control/Status Register
H'FFF8C
WDT
Bit
7
6
5
4
OVF
WT/IT
TME
—
Initial value
0
0
0
1
Read/Write R/(W)*
R/W
R/W
—
3
2
1
0
—
CKS2
CKS1
CKS0
1
0
0
0
—
R/W
R/W
R/W
Clock select 2 to 0
CKS2 CKS1 CKS0 Description
0 φ/2
0
1 φ/32
0
0 φ/64
1
1 φ/128
0 φ/256
0
1 φ/512
1
0 φ/2048
1
1 φ/4096
Timer enable
0 ^{Timer disabled}
• TCNT is initialized to H'00 and halted
1 ^{Timer enabled}
• TCNT is counting
Timer mode select
0 ^{Interval timer:}
requests interval timer interrupts
1 ^{Watchdog timer:}
generates a reset signal
Overflow flag
0 ^{[Clearing condition]}
Read OVF when OVF = 1, then write 0 in OVF
1 ^{[Setting condition]}
TCNT changes from H'FF to H'00
Note: * Only 0 can be written, to clear the flag.
Rev. 2.00, 09/03, page 808 of 890