HD64F3028F25 Datasheet, PDF (183/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Table 6.5 Settings of Bits DRAS2 to DRAS0 and Corresponding DRAM Space (RAS
Output Pin)
DRAS2 DRAS1 DRAS0 Area 5
Area 4
Area 3
Area 2
0
0
0
Normal space Normal space Normal space Normal space
1
Normal space Normal space Normal space DRAM space
(CS2)
1
0
Normal space Normal space DRAM space DRAM space
(CS3)
(CS2)
1
Normal space Normal space DRAM space DRAM space
(CS2)^*
(CS2)^*
1
0
0
Normal space DRAM space DRAM space DRAM space
(CS4)
(CS3)
(CS2)
1
DRAM space DRAM space DRAM space DRAM space
(CS5)
(CS4)
(CS3)
(CS2)
1
0
DRAM space DRAM space DRAM space DRAM space
(CS4)^*
(CS4)^*
(CS2)^*
(CS2)^*
1
DRAM space DRAM space DRAM space DRAM space
(CS2)^*
(CS2)^*
(CS2)^*
(CS2)^*
Note: * A single CSn pin serves as a common RAS output pin for a number of areas. Unused CSn
pins can be used as input/output ports.
Rev. 2.00, 09/03, page 151 of 890