HD64F3028F25 Datasheet, PDF (689/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Module
SCI
DMAC
Item
Symbol
Input clock Asyn-
tScyc
cycle
chronous
Syn-
chronous
Input clock rise time
Input clock fall time
Input clock pulse width
Transmit data delay time
Receive data setup time
(synchronous)
tSCKr
tSCKf
tSCKW
tTXD
tRXS
Receive
data hold
time (syn-
chronous)
Clock input tRXH
Clock output
TEND delay time 1
TEND delay time 2
DREQ setup time
DREQ hold time
tTED1
tTED2
tDRQS
tDRQH
Condition
f = 2 M to 25 MHz
Min
Max
4
—
Unit
tcyc
6
—
tcyc
—
1.5
tcyc
—
1.5
tcyc
0.4
0.6
tScyc
—
100
ns
100
—
ns
100
—
ns
0
—
ns
—
50
ns
—
50
ns
25
—
ns
10
—
ns
Test Conditions
Figure 21.23
Figure 21.24
Figure 21.25,
figure 21.26
Figure 21.27
H8/3028 Mask ROM
output pin
C
R_L
C = 90 pF: ports 1 to 5, 66 to 60, 8,
A19 to A0, D15 to D8, φ
C = 30 pF: ports 9, A, B, RESO
R_L = 2.4 kΩ
R_H
R_H = 12 kΩ
Input/output timing measurement
levels
• Low: 0.8 V
• High: 2.0 V
Figure 21.3 Output Load Circuit
Rev. 2.00, 09/03, page 657 of 890