HD64F3028F25 Datasheet, PDF (615/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory blocks are program/erase-protected.
Bit 3
RAMS
0
1
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
(Initial value)
Bits 2 to 0—Flash Memory Area Selection (RAM2 to RAM0): These bits are used together
with bit 3 to select the flash memory area to be overlapped with RAM. (See table 18.5.)
Table 18.5 Flash Memory Area Divisions
RAM Area
H'FFE000 to H'FFEFFF
Block Name
4-kbyte RAM area
RAMS
0
RAM2
*
RAM1
*
RAM0
*
H'000000 to H'000FFF
EB0 (4 kbytes)
1
0
0
0
H'001000 to H'001FFF
EB1 (4 kbytes)
1
0
0
1
H'002000 to H'002FFF
EB2 (4 kbytes)
1
0
1
0
H'003000 to H'003FFF
EB3 (4 kbytes)
1
0
1
1
H'004000 to H'004FFF
EB4 (4 kbytes)
1
1
0
0
H'005000 to H'005FFF
EB5 (4 kbytes)
1
1
0
1
H'006000 to H'006FFF
EB6 (4 kbytes)
1
1
1
0
H'007000 to H'007FFF
EB7 (4 kbytes)
1
1
1
1
*: Don’t care
Note: Flash memory emulation by RAM is not supported in mode 6 (single-chip normal mode);
therefore, although these bits can be written, they should not be set to 1.
When performing flash memory emulation by RAM, the RAME bit in SYSCR must be set to
1.
Rev. 2.00, 09/03, page 583 of 890