HD64F3028F25 Datasheet, PDF (300/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

8.7.2 Register Descriptions
Table 8.10 summarizes the registers of port 6.
Table 8.10 Port 6 Registers
Address^*
Name
Abbreviation
H'EE005
Port 6 data direction register P6DDR
H'FFFD5
Port 6 data register
P6DR
Note: * Lower 20 bits of the address in advanced mode.
R/W
W
R/W
Initial Value
H'80
H'80
Port 6 Data Direction Register (P6DDR): P6DDR is an 8-bit write-only register that can select
input or output for each pin in port 6.
Bit 7 is reserved. It is fixed at 1, and cannot be modified.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
— P6₆DDR P6₅DDR P6₄DDR P6₃DDR P6₂DDR P6₁DDR P6₀DDR
1
0
0
0
0
0
0
0
—
W
W
W
W
W
W
W
Reserved bit
Port 6 data direction 6 to 0
These bits select input or output for port 6 pins
Modes 1 to 5 (Expanded Modes): P6₇ functions as the clock output pin (φ) or an input port. P6₇
is the clock output pin (φ) if the PSTOP bit in MSTRCH is cleared to 0 (initial value), and an input
port if this bit is set to 1.
P6₆ to P6₃ function as bus control output pins (LWR, HWR, RD, and AS), regardless of the
settings of bits P6₆DDR to P6₃DDR.
P6₂ to P6₀ function as bus control input/output pins (BACK, BREQ, and WAIT) or input/output
ports. For the method of selecting the pin functions, see table 8.11.
When P6₂ to P6₀ function as input/output ports, the pin becomes an output port if the
corresponding P6DDR bit is set to 1, and an input port if this bit is cleared to 0.
Rev. 2.00, 09/03, page 268 of 890