HD64F3028F25 Datasheet, PDF (802/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

RTMCSR—Refresh Timer Control/Status Register
H'EE028
Bit
7
6
5
4
3
2
1
CMF CMIE CKS2 CKS1 CKS0 —
—
Initial value
0
0
0
0
0
1
1
Read/Write R/(W)* R/W R/W R/W R/W —
—
DRAM interface
0
—
1
—
Refresh counter clock select
CKS2
0
1
CKS1
0
1
0
1
CKS0
0
1
0
1
0
1
0
1
Description
Count operation halted
φ/2 used as counter clock
φ/8 used as counter clock
φ/32 used as counter clock
φ/128 used as counter clock
φ/512 used as counter clock
φ/2048 used as counter clock
φ/4096 used as counter clock
Compare match interrupt enable
0 The CMI interrupt requested by the CMF flag is disabled
1 The CMI interrupt requested by the CMF flag is enabled
Compare match flag
0 [Clearing conditions]
• Cleared by a reset and in standby mode
• Cleared by reading CMF when CMF = 1, then writing 0 in CMF
1 _{[Setting condition]}
When RTCNT = RTCOR
Note: * Only 0 can be written to clear the flag.
Rev. 2.00, 09/03, page 770 of 890