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HD64F3028F25 Datasheet, PDF (572/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
15.1.2 Block Diagram
Figure 15.1 shows a block diagram of the A/D converter.
Module data bus
Internal
data bus
AVCC
VREF
AVSS
10-bit D/A
AN 0
+
AN 1
–
AN 2
AN 3
Analog
multi-
Comparator
AN 4
plexer Sample-and-
AN 5
hold circuit
AN 6
AN 7
Control circuit
ADTRG
Compare match A0
ADTE
8-bit timer TCSR0
Legend
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
Figure 15.1 A/D Converter Block Diagram
φ/4
φ/8
ADI
interrupt signal
Rev. 2.00, 09/03, page 540 of 890