HD64F3028F25 Datasheet, PDF (403/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Table 9.7 (b) 16-bit timer Operating Modes (Channel 1)
Register Settings
TSNC
TMDR
TIOR1
16TCR1
Synchro-
Clear
Clock
Operating Mode
nization MDF FDIR PWM
IOA
IOB
Select
Select
Synchronous preset SYNC1 = 1 —
—
PWM mode
—
— PWM1 = 1 —
*
Output compare A
—
— PWM1 = 0 IOA2 = 0
Other bits
unrestricted
Output compare B
—
—
IOB2 = 0
Other bits
unrestricted
Input capture A
—
— PWM1 = 0 IOA2 = 1
Other bits
unrestricted
Input capture B
—
— PWM1 = 0
IOB2 = 1
Other bits
unrestricted
Counter By compare
clearing match/input
capture A
—
—
CCLR1 = 0
CCLR0 = 1
By compare
match/input
capture B
—
—
CCLR1 = 1
CCLR0 = 0
Syn-
SYNC1 = 1 —
—
chronous
clear
CCLR1 = 1
CCLR0 = 1
Legend: Setting available (valid). — Setting does not affect this mode.
Note: * The input capture function cannot be used in PWM mode. If compare match A and compare match B
occur simultaneously, the compare match signal is inhibited.
Rev. 2.00, 09/03, page 371 of 890