HD64F3028F25 Datasheet, PDF (854/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

SCR—Serial Control Register
H'FFFB2
SCI0
Bit
7
6
5
4
3
2
1
0
TIE
RIE
TE
RE
MPIE
TEIE
CKE1
CKE0
Initial value
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
0
0
0
R/W
R/W
R/W
Receive enable
0
Receiving is
disabled
1
Receiving is
enabled
Transmit enable
0 Transmitting is disabled
1 Transmitting is enabled
Clock enable 1 and 0
(for serial communication interface)
Bit 1 Bit 0
CKE1 CKE0
Description
Asynchronous mode
Internal clock, SCK pin
available for generic I/O
0
Synchronous mode
Internal clock, SCK pin
used for serial clock output
0
Asynchronous mode
Internal clock, SCK pin
used for clock output
1
Synchronous mode
Internal clock, SCK pin
used for serial clock output
Asynchronous mode
External clock, SCK pin
used for clock input
0
Synchronous mode
External clock, SCK pin
used for serial clock input
1
External clock, SCK pin
Asynchronous mode _{used for clock input}
1
Synchronous mode
External clock, SCK pin
used for serial clock input
Clock enable 1 and 0 (for smart card interface)
SMR Bit 1 Bit 0
GM CKE1 CKE0
Description
0 SCK pin available for generic I/O
0
0
1 SCK pin used for clock output
0 SCK pin output fixed low
0
1 SCK pin used for clock output
1
0 SCK pin output fixed high
1
1 SCK pin used for clock output
Transmit-end interrupt enable
0 Transmit-end interrupt requests (TEI) are disabled
1 Transmit-end interrupt requests (TEI) are enabled
Multiprocessor interrupt enable
0 Multiprocessor interrupts are disabled (normal receive operation)
1 Multiprocessor interrupts are enabled
Receive interrupt enable
0 Receive-data-full (RXI) and receive-error (ERI) interrupt requests are disabled
1 Receive-data-full (RXI) and receive-error (ERI) interrupt requests are enabled
Transmit interrupt enable
0 Transmit-data-empty interrupt request (TXI) is disabled
1 Transmit-data-empty interrupt request (TXI) is enabled
Rev. 2.00, 09/03, page 822 of 890