HD64F3028F25 Datasheet, PDF (344/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Block Diagram of Channels 0 and 1: 16-bit timer channels 0 and 1 are functionally identical.
Both have the structure shown in figure 9.2.
TCLKA to TCLKD
φ, φ/2, φ/4, φ/8
Clock selector
Comparator
Control logic
TIOCA₀
TIOCB₀
IMIA0
IMIB0
OVI0
Module data bus
Legend:
16TCNT: Timer counter (16 bits)
GRA, GRB: General registers A and B (input capture/output compare registers) (16 bits ^× 2)
TCR:
Timer control register (8 bits)
TIOR:
Timer I/O control register (8 bits)
Figure 9.2 Block Diagram of Channels 0 and 1
Rev. 2.00, 09/03, page 312 of 890