HD64F3028F25 Datasheet, PDF (121/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Bit 7—Priority Level B7 (IPRB7): Selects the priority level of 8-bit timer channel 0, 1 interrupt
requests.
Bit 7
IPRB7
0
1
Description
8-bit timer channel 0, 1 interrupt requests have priority level 0 (low priority)(Initial value)
8-bit timer channel 0, 1 interrupt requests have priority level 1 (high priority)
Bit 6—Priority Level B6 (IPRB6): Selects the priority level of 8-bit timer channel 2, 3 interrupt
requests.
Bit 6
IPRB6
0
1
Description
8-bit timer channel 2, 3 interrupt requests have priority level 0 (low priority)(Initial value)
8-bit timer channel 2, 3 interrupt requests have priority level 1 (high priority)
Bit 5—Priority Level B5 (IPRB5): Selects the priority level of DMAC interrupt requests
(channels 0 and 1).
Bit 5
IPRB5
0
1
Description
DMAC interrupt requests (channels 0 and 1) have priority level 0
(low priority)
(Initial value)
DMAC interrupt requests (channels 0 and 1) have priority level 1 (high priority)
Bit 4—Reserved: This bit can be written and read, but it does not affect interrupt priority.
Bit 3—Priority Level B3 (IPRB3): Selects the priority level of SCI channel 0 interrupt requests.
Bit 3
IPRB3
0
1
Description
SCI0 interrupt requests have priority level 0 (low priority)
SCI0 interrupt requests have priority level 1 (high priority)
(Initial value)
Bit 2—Priority Level B2 (IPRB2): Selects the priority level of SCI channel 1 interrupt requests.
Bit 2
IPRB2
0
1
Description
SCI1 interrupt requests have priority level 0 (low priority)
SCI1 interrupt requests have priority level 1 (high priority)
(Initial value)
Rev. 2.00, 09/03, page 89 of 890