HD64F3028F25 Datasheet, PDF (783/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Address Register
(Low) Name
Data
Bus
Width Bit 7
Bit 6
Bit 5
Bit Names
Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Module
Name
H'FFFE0 ADDRAH 8
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
A/D converter
H'FFFE1 ADDRAL 8
AD1
AD0
—
—
—
—
—
—
H'FFFE2 ADDRBH 8
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
H'FFFE3 ADDRBL 8
AD1
AD0
—
—
—
—
—
—
H'FFFE4 ADDRCH 8
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
H'FFFE5 ADDRCL 8
AD1
AD0
—
—
—
—
—
—
H'FFFE6 ADDRDH 8
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
H'FFFE7 ADDRDL 8
AD1
AD0
—
—
—
—
—
—
H'FFFE8 ADCSR 8
ADF ADIE ADST SCAN CKS CH2
CH1
CH0
H'FFFE9 ADCR
8
TRGE —
—
—
—
—
—
—
H'FFFEA Reserved area (access prohibited)
H'FFFEB
H'FFFEC DADR0 8
D/A converter
H'FFFED DADR1 8
H'FFFEE DACR
8
—
—
—
—
—
—
—
—
H'FFFEF —
8
—
—
—
—
—
—
—
—
H'FFFF0 P1DR
8
P17
P16
P15
P14
P13
P12
P11
P10
Port 1
H'FFFF1 P2DR
8
P27
P26
P25
P24
P23
P22
P21
P20
Port 2
H'FFFF2 P3DR
8
P37
P36
P35
P34
P33
P32
P31
P30
Port 3
H'FFFF3 P4DR
8
P47
P46
P45
P44
P43
P42
P41
P40
Port 4
H'FFFF4 P5DR
8
—
—
—
—
P53
P52
P51
P50
Port 5
H'FFFF5 P6DR
8
P67
P66
P65
P64
P63
P62
P61
P60
Port 6
H'FFFF6 P7DR
8
P77
P76
P75
P74
P73
P72
P71
P70
Port 7
H'FFFF7 P8DR
8
—
—
—
P84
P83
P82
P81
P80
Port 8
H'FFFF8 P9DR
8
—
—
P95
P94
P93
P92
P91
P90
Port 9
H'FFFF9 PADR
8
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Port A
H'FFFFA PBDR
8
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Port B
H'FFFFB —
—
—
—
—
—
—
—
—
H'FFFFC —
—
—
—
—
—
—
—
—
H'FFFFD —
—
—
—
—
—
—
—
—
H'FFFFE —
—
—
—
—
—
—
—
—
H'FFFFF —
—
—
—
—
—
—
—
—
Notes: 1. These registers are only used by the flash memory version, and are not provided in the
mask ROM versions.
2. For write access to TCSR, TCNT, and RSTCSR, see section 12.2.4, Notes on Register
Access.
3. The address depends on the output trigger setting.
Legend
WDT: Watchdog timer
TPC: Programmable timing pattern controller
SCI: Serial communication interface
Rev. 2.00, 09/03, page 751 of 890