HD64F3028F25 Datasheet, PDF (123/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

5.2.4 IRQ Enable Register (IER)
IER is an 8-bit readable/writable register that enables or disables IRQ₅ to IRQ₀ interrupt requests.
Bit
7
6
5
4
3
2
1
0
—
— IRQ5E IRQ4E IRQ3E IRQ2E IRQ1E IRQ0E
Initial value
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W R/W
R/W R/W
R/W R/W R/W
Reserved bits
IRQ ₅ to IRQ₀ enable
These bits enable or disable IRQ ₅ to IRQ₀ interrupts
IER is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: These bits can be written and read, but they do not enable or disable
interrupts.
Bits 5 to 0—IRQ₅ to IRQ₀ Enable (IRQ5E to IRQ0E): These bits enable or disable
IRQ₅ to IRQ₀ interrupts.
Bits 5 to 0
IRQ5E to IRQ0E Description
0
IRQ5 to IRQ0 interrupts are disabled
1
IRQ5 to IRQ0 interrupts are enabled
(Initial value)
Rev. 2.00, 09/03, page 91 of 890