HD64F3028F25 Datasheet, PDF (124/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

5.2.5 IRQ Sense Control Register (ISCR)
ISCR is an 8-bit readable/writable register that selects level sensing or falling-edge sensing of the
inputs at pins IRQ₅ to IRQ₀.
Bit
7
6
5
4
3
2
1
0
—
— IRQ5SC IRQ4SC IRQ3SC IRQ2SC IRQ1SC IRQ0SC
Initial value
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved bits
IRQ ₅ to IRQ₀ sense control
These bits select level sensing or falling-edge
sensing for IRQ ₅ to IRQ₀ interrupts
ISCR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: These bits can be written and read, but they do not select level or
falling-edge sensing.
Bits 5 to 0—IRQ₅ to IRQ₀ Sense Control (IRQ5SC to IRQ0SC): These bits select whether
interrupts IRQ₅ to IRQ₀ are requested by level sensing of pins IRQ₅ to IRQ₀, or by falling-edge
sensing.
Bits 5 to 0
IRQ5SC to IRQ0SC Description
0
Interrupts are requested when IRQ5 to IRQ0 inputs are low (Initial value)
1
Interrupts are requested by falling-edge input at IRQ5 to IRQ0
Rev. 2.00, 09/03, page 92 of 890