HD64F3028F25 Datasheet, PDF (239/925 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Bit 6—Reserved: Although reserved, this bit can be written and read.
Bit 5—Destination Address Increment/Decrement (DAID) and,
Bit 4—Destination Address Increment/Decrement Enable (DAIDE): These bits select whether
the destination address register (MARB) is incremented, decremented, or held fixed during the
data transfer.
Bit 5
DAID
0
1
Bit 4
DAIDE
0
1
0
1
Description
MARB is held fixed
(Initial value)
MARB is incremented after each data transfer
• If DTSZ = 0, MARB is incremented by 1 after each data transfer
• If DTSZ = 1, MARB is incremented by 2 after each data transfer
MARB is held fixed
MARB is decremented after each data transfer
• If DTSZ = 0, MARB is decremented by 1 after each data transfer
• If DTSZ = 1, MARB is decremented by 2 after each data transfer
Bit 3—Transfer Mode Select (TMS): Selects whether the source or destination is the block area
in block transfer mode.
Bit 3
TMS
0
1
Description
Destination is the block area in block transfer mode
Source is the block area in block transfer mode
(Initial value)
Rev. 2.00, 09/03, page 207 of 890