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HD6413008VF25 Datasheet, PDF (77/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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2. CPU
Table 2.4 Arithmetic Operation Instructions
Instruction Size*
ADD,SUB B/W/L
ADDX,
B
SUBX
INC,
DEC
B/W/L
ADDS,
L
SUBS
DAA,
B
DAS
MULXU B/W
MULXS B/W
Function
Rd ± Rs â Rd, Rd ± #IMM â Rd
Performs addition or subtraction on data in two general registers, or on
immediate data and data in a general register. (Immediate byte data cannot
be subtracted from data in a general register. Use the SUBX or ADD
instruction.)
Rd ± Rs ± C â Rd, Rd ± #IMM ± C â Rd
Performs addition or subtraction with carry or borrow on data in two general
registers, or on immediate data and data in a general register.
Rd ± 1 â Rd, Rd ± 2 â Rd
Increments or decrements a general register by 1 or 2. (Byte operands can
be incremented or decremented by 1 only.)
Rd ± 1 â Rd, Rd ± 2 â Rd, Rd ± 4 â Rd
Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit register.
Rd decimal adjust â Rd
Decimal-adjusts an addition or subtraction result in a general register by
referring to CCR to produce 4-bit BCD data.
Rd à Rs â Rd
Performs unsigned multiplication on data in two general registers:
either 8 bits à 8 bits â 16 bits or 16 bits à 16 bits â 32 bits.
Rd à Rs â Rd
Performs signed multiplication on data in two general registers:
either 8 bits à 8 bits â 16 bits or 16 bits à 16 bits â 32 bits.
Rev.4.00 Aug. 20, 2007 Page 31 of 638
REJ09B0395-0400
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