HD6413008VF25 Datasheet, PDF (548/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix A Instruction Set
Addressing Mode and
Instruction Length (bytes)
No. of
States*¹
Mnemonic
INC.L #1, ERd
INC.L #2, ERd
DAA Rd
L
2
L
2
B
2
SUB.B Rs, Rd
SUB.W #xx:16, Rd
SUB.W Rs, Rd
SUB.L #xx:32, ERd
B
2
W4
W
2
L6
SUB.L ERs, ERd
L
2
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
SUBS.L #1, ERd
SUBS.L #2, ERd
SUBS.L #4, ERd
DEC.B Rd
DEC.W #1, Rd
DEC.W #2, Rd
DEC.L #1, ERd
DEC.L #2, ERd
DAS.Rd
B2
B
2
L
2
L
2
L
2
B
2
W
2
W
2
L
2
L
2
B
2
MULXU. B Rs, Rd B
2
MULXU. W Rs, ERd W
2
MULXS. B Rs, Rd B
4
MULXS. W Rs, ERd W
4
DIVXU. B Rs, Rd
B
2
Rev.4.00 Aug. 20, 2007 Page 502 of 638
REJ09B0395-0400
Condition Code
Operation
I HNZVC
ERd32+1 → ERd32
⎯⎯
⎯2
ERd32+2 → ERd32
⎯⎯
⎯2
Rd8 decimal adjust
→ Rd8
⎯*
*⎯ 2
Rd8−Rs8 → Rd8
⎯
2
Rd16−#xx:16 → Rd16 ⎯ (1)
4
Rd16−Rs16 → Rd16 ⎯ (1)
2
ERd32–#xx:32
⎯ (2)
6
→ ERd32
ERd32–ERs32
⎯ (2)
2
→ ERd32
Rd8−#xx:8−C → Rd8 ⎯
(3)
2
Rd8−Rs8−C → Rd8
⎯
(3)
2
ERd32−1 → ERd32
⎯⎯⎯⎯⎯⎯ 2
ERd32−2 → ERd32
⎯⎯⎯⎯⎯⎯ 2
ERd32−4 → ERd32
⎯⎯⎯⎯⎯⎯ 2
Rd8−1 → Rd8
⎯⎯
⎯2
Rd16−1 → Rd16
⎯⎯
⎯2
Rd16−2 → Rd16
⎯⎯
⎯2
ERd32−1 → ERd32
⎯⎯
⎯2
ERd32−2 → ERd32
⎯⎯
⎯2
Rd8 decimal adjust
→ Rd8
⎯*
*⎯ 2
Rd8 × Rs8 → Rd16
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 14
(unsigned multiplication)
Rd16 × Rs16 → ERd32 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 22
(unsigned multiplication)
Rd8 × Rs8 → Rd16
⎯⎯
(signed multiplication)
⎯ ⎯ 16
Rd16 × Rs16 → ERd32 ⎯ ⎯
(signed multiplication)
⎯ ⎯ 24
Rd16 ÷ Rs8 → Rd16 ⎯ ⎯ (6) (7) ⎯ ⎯ 14
(RdH: remainder, RdL:
quotient)
(unsigned division)