HD6413008VF25 Datasheet, PDF (434/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

13. Smart Card Interface
13.2.2 Serial Status Register (SSR)
The function of SSR bit 4 is modified in smart card interface mode. This change also causes a
modification to the setting conditions for bit 2 (TEND).
Bit
Initial value
Read/Write
7
TDRE
1
R/(W)*
6
RDRF
0
R/(W)*
5
ORER
0
R/(W)*
4
ERS
0
R/(W)*
3
PER
0
R/(W)*
2
TEND
1
R
1
MPB
0
R
0
MPBT
0
R/W
Transmit end
Status flag indicating end
of transmission
Error signal status (ERS)
Status flag indicating that an error
signal has been received
Note: * Only 0 can be written, to clear the flag.
Bits 7 to 5: These bits operate as in normal serial communication. For details see section 12.2.7,
Serial Status Register (SSR).
Bit 4—Error Signal Status (ERS): In smart card interface mode, this flag indicates the status of
the error signal sent from the receiving device to the transmitting device. The smart card interface
does not detection framing errors.
Bit 4
ERS
Description
0
Indicates normal transmission, with no error signal returned
[Clearing conditions]
(Initial value)
• The chip is reset, or enters standby mode or module stop mode
• Software reads ERS while it is set to 1, then writes 0.
1
Indicates that the receiving device sent an error signal reporting a parity error
[Setting condition]
A low error signal was sampled.
Note: Clearing the TE bit to 0 in SCR does not affect the ERS flag, which retains its previous
value.
Rev.4.00 Aug. 20, 2007 Page 388 of 638
REJ09B0395-0400