HD6413008VF25 Datasheet, PDF (300/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

9. 8-Bit Timers
9.2.5 Timer Control/Status Registers (8TCSR)
8TCSR0
Bit
Initial value
Read/Write
7
CMFB
0
R/(W)*
6
CMFA
0
R/(W)*
5
OVF
0
R/(W)*
4
ADTE
0
R/W
3
OIS3
0
R/W
2
OIS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
8TCSR2
Bit
7
6
5
4
CMFB CMFA OVF
⎯
Initial value
0
0
0
1
Read/Write R/(W)* R/(W)* R/(W)* ⎯
3
OIS3
0
R/W
2
OIS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
8TCSR1, 8TCSR3
Bit
7
6
5
4
CMFB CMFA OVF
ICE
Initial value
0
0
0
0
Read/Write R/(W)* R/(W)* R/(W)* R/W
3
OIS3
0
R/W
2
OIS2
0
R/W
1
OS1
0
R/W
0
OS0
0
R/W
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
The timer control/status registers 8TCSR are 8-bit registers that indicate compare match/input
capture and overflow statuses, and control compare match output/input capture edge selection.
8TCSR2 is initialized to H'10, and 8TCSR0, 8TCSR1, and 8TCSR3 to H'00, by a reset and in
standby mode.
Rev.4.00 Aug. 20, 2007 Page 254 of 638
REJ09B0395-0400