HD6413008VF25 Datasheet, PDF (188/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

7. I/O Ports
Port Description
Pins
Port 8 •
•
5-bit I/O port P8₄/CS₀
P8₂ to P8₀ have
schmitt inputs P8₃/IRQ₃/CS₁/
ADTRG
P8₂/IRQ₂/CS₂
P8₁/IRQ₁/CS₃
Port 9 •
Port A •
•
P8₀/IRQ₀
6-bit I/O port
P9₅/IRQ₅ /SCK₁
P9₄/IRQ₄ /SCK₀
P9₃/RxD₁
P9₂/RxD₀
P9₁/TxD₁
P9₀/TxD₀
8-bit I/O port PA₇/TP₇/
Schmitt inputs ^TIOCB2/A20
PA₆/TP₆/TIOCA₂/A₂₁
PA₅/TP₅/TIOCB₁/A₂₂
PA₄/TP₄/TIOCA₁/A₂₃
PA₃/TP₃/TIOCB₀/
TCLKD
PA₂/TP₂/TIOCA₀/
TCLKC
PA₁/TP₁/TCLKB
PA₀/TP₀/TCLKA
Expanded Modes
Mode 1
Mode 2
Mode 3
Mode 4
DDR = 0: generic input
DDR
=
1
(reset
value):
CS
0
output
IRQ
3
input,
CS
1
output,
external
trigger
input
(ADTRG)
to
A/D converter, and generic input
DDR = 0 (after reset): generic input
DDR
=
1:
CS
1
output
IRQ
2
and
IRQ
1
input,
CS
2
and
CS
3
output,
and
generic
input
DDR = 0 (after reset): generic input
DDR
=
1:
CS
2
and
CS
3
output
IRQ
0
input,
and
generic
input/output
Input and output (SCK₁, SCK₀, RxD₁, RxD₀, TxD₁, TxD₀) for
serial
communication
interfaces
1
and
0
(SCI1/0),
IRQ
5
and
IRQ
4
input,
and
6-bit
generic
input/output
Output (TP₇) from pro-
grammable timing pattern
controller (TPC), input or
output (TIOCB₂) for 16-bit
timer and generic
input/output
Address output (A₂₀)
TPC output (TP₆ to TP₄), 16-bit timer input and output
(TIOCA₂, TIOCB₁, TIOCA₁), and generic input/output
TPC output (TP₃ to TP₀), 16-bit timer input and output
(TIOCB₀, TIOCA₀, TCLKD, TCLKC, TCLKB, TCLKA), 8-bit
timer input (TCLKD, TCLKC, TCLKB, TCLKA), and
generic input/output
Rev.4.00 Aug. 20, 2007 Page 142 of 638
REJ09B0395-0400