HD6413008VF25 Datasheet, PDF (609/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
TIOR0—Timer I/O Control Register 0
H'FFF69
16-bit timer channel 0
Bit:
Initial value:
Read/Write:
7
6
5
4
3
2
1
0
⎯ IOB2 IOB1 IOB0 ⎯ IOA2 IOA1 IOA0
1
0
0
0
1
0
0
0
⎯ R/W R/W R/W ⎯ R/W R/W R/W
I / O control A2 to A0
Bit 2
Bit 1
Bit 0
IOA2
0
IOA1
0
1
IOA0
0
1
0
1
0
0
1
1
1
0
1
GRA is an output
compare register
GRA is an input
capture register
Description
No output at compare match (Initial value)
0 output at GRA compare match
1 output at GRA compare match
Output toggles at GRA compare match
(1 output on channel 2)
GRA captures rising edges of input
GRA captures falling edges of input
GRB captures both edges of input
I / O control B2 to B0
Bit 6
Bit 5
Bit 4
IOB2
IOB1
0
IOB0
0
1
0
0
1
1
0
0
1
1
1
0
1
GRB is an output
compare register
GRB is an input
capture register
Description
No output at compare match (Initial value)
0 output at GRB compare match
1 output at GRB compare match
Output toggles at GRB compare match
(1 output on channel 2)
GRB captures rising edges of input
GRB captures falling edges of input
GRB captures both edges of input
Rev.4.00 Aug. 20, 2007 Page 563 of 638
REJ09B0395-0400