HD6413008VF25 Datasheet, PDF (242/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8. 16-Bit Timer
Bit 5—Overflow Interrupt Enable 1 (OVIE1): Enables or disables the interrupt requested by the
OVF1 when OVF1 flag is set to 1.
Bit 5
OVIE1
0
1
Description
OVI1 interrupt requested by OVF1 flag is disabled
OVI1 interrupt requested by OVF1 flag is enabled
(Initial value)
Bit 4—Overflow Interrupt Enable 0 (OVIE0): Enables or disables the interrupt requested by the
OVF0 when OVF0 flag is set to 1.
Bit 4
OVIE0
0
1
Description
OVI0 interrupt requested by OVF0 flag is disabled
OVI0 interrupt requested by OVF0 flag is enabled
(Initial value)
Bit 3—Reserved: This bit cannot be modified and is always read as 1.
Bit 2—Overflow Flag 2 (OVF2): This status flag indicates 16TCNT2 overflow.
Bit 2
OVF2
Description
0
[Clearing condition]
Read OVF2 flag when OVF2 = 1, then write 0 in OVF2 flag
(Initial value)
1
[Setting condition]
16TCNT2 overflowed from H'FFFF to H'0000, or underflowed from H'0000 to H'FFFF
Note: 16TCNT underflow occurs when 16TCNT operates as an up/down-counter. Underflow
occurs only when channel 2 operates in phase counting mode (MDF = 1 in TMDR).
Bit 1—Overflow Flag 1 (OVF1): This status flag indicates 16TCNT1 overflow.
Bit 1
OVF1
0
1
Description
[Clearing condition]
Read OVF1 flag when OVF1 = 1, then write 0 in OVF1 flag
[Setting condition]
16TCNT1 overflowed from H'FFFF to H'0000
(Initial value)
Rev.4.00 Aug. 20, 2007 Page 196 of 638
REJ09B0395-0400