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HD6413008VF25 Datasheet, PDF (74/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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2. CPU
2.6.2 Instructions and Addressing Modes
Table 2.2 indicates the instructions available in the H8/300H CPU.
Table 2.2 Instructions and Addressing Modes
Addressing Modes
Function Instruction
#xx Rn
@
@
@
@
(d:16, (d:24, @ERn+/ @
@
@
(d:8, (d:16, @@
@ERn ERn) ERn) @âERn aa:8 aa:16 aa:24 PC) PC) aa:8 â¯
Data
MOV
BWL BWL BWL BWL BWL BWL
B
BWL BWL â¯
â¯
â¯
â¯
transfer
POP, PUSH â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
WL
MOVFPE,
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
MOVTPE
Arithmetic ADD, CMP
BWL BWL â¯
â¯
â¯
â¯
operations SUB
WL BWL â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
ADDX, SUBX B
B
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
ADDS, SUBS â¯
L
â¯
â¯
â¯
â¯
INC, DEC
â¯
BWL â¯
â¯
â¯
â¯
DAA, DAS
â¯
B
â¯
â¯
â¯
â¯
MULXU,
â¯
BW â¯
â¯
â¯
â¯
MULXS,
DIVXU,
DIVXS
NEG
â¯
BWL â¯
â¯
â¯
â¯
EXTU, EXTS â¯
WL â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
Logic
AND, OR, XOR â¯
BWL â¯
â¯
â¯
â¯
operations
NOT
â¯
BWL â¯
â¯
â¯
â¯
Shift instructions
â¯
BWL â¯
â¯
â¯
â¯
Bit manipulation
â¯
B
B
â¯
â¯
â¯
Branch
Bcc, BSR
â¯
â¯
â¯
â¯
â¯
â¯
JMP, JSR
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
B
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
System
control
RTS
TRAPA
RTE
SLEEP
LDC
STC
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
B
B
W
W
W
W
â¯
B
W
W
W
W
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
W
W
â¯
â¯
â¯
â¯
W
W
â¯
â¯
â¯
â¯
ANDC, ORC, B
XORC
â¯
â¯
â¯
â¯
â¯
NOP
â¯
â¯
â¯
â¯
â¯
â¯
Block data transfer
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
BW
Rev.4.00 Aug. 20, 2007 Page 28 of 638
REJ09B0395-0400
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