HD6413008VF25 Datasheet, PDF (43/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Table 9.4
Table 9.5
Table 9.6
Table 9.7
Table 9.8
Operation of Channels 2 and 3 when Bit ICE is Set to 1 in 8TCSR3 Register .. 257
Types of 8-Bit Timer Interrupt Sources and Priority Order ............................... 269
8-Bit Timer Interrupt Sources............................................................................. 270
Timer Output Priority Order............................................................................... 279
Internal Clock Switchover and 8TCNT Operation ............................................. 280
Section 10 Programmable Timing Pattern Controller (TPC)
Table 10.1 TPC Pins............................................................................................................. 285
Table 10.2 TPC Registers..................................................................................................... 286
Table 10.3 TPC Operating Conditions ................................................................................. 300
Section 11 Watchdog Timer
Table 11.1 WDT Pin ............................................................................................................ 310
Table 11.2 WDT Registers ................................................................................................... 311
Table 11.3 Read Addresses of TCNT, TCSR, and RSTCSR ............................................... 316
Section 12 Serial Communication Interface
Table 12.1 SCI Pins.............................................................................................................. 324
Table 12.2 SCI Registers...................................................................................................... 325
Table 12.3 Examples of Bit Rates and BRR Settings in Asynchronous Mode..................... 343
Table 12.4 Examples of Bit Rates and BRR Settings in Synchronous Mode....................... 346
Table 12.5 Maximum Bit Rates for Various Frequencies (Asynchronous Mode) ............... 348
Table 12.6 Maximum Bit Rates with External Clock Input (Asynchronous Mode) ............ 349
Table 12.7 Maximum Bit Rates with External Clock Input (Synchronous Mode)............... 350
Table 12.8 SMR Settings and Serial Communication Formats ............................................ 352
Table 12.9 SMR and SCR Settings and SCI Clock Source Selection .................................. 352
Table 12.10 Serial Communication Formats (Asynchronous Mode) ..................................... 354
Table 12.11 Receive Error Conditions ................................................................................... 361
Table 12.12 SCI Interrupt Sources ......................................................................................... 377
Table 12.13 SSR Status Flags and Transfer of Receive Data................................................. 378
Section 13 Smart Card Interface
Table 13.1 Smart Card Interface Pins................................................................................... 385
Table 13.2 Smart Card Interface Registers........................................................................... 385
Table 13.3 Smart Card Interface Register Settings............................................................... 394
Table 13.4 n-Values of CKS1 and CKS0 Settings ............................................................... 396
Table 13.5 Bit Rates (bits/s) for Various BRR Settings (When n = 0) ................................. 396
Table 13.6 BRR Settings for Typical Bit Rates (bits/s) (When n = 0) ................................. 397
Table 13.7 Maximum Bit Rates for Various Frequencies (Smart Card Interface Mode) ..... 397
Table 13.8 Smart Card Interface Mode Operating States and Interrupt Sources.................. 404
Rev.4.00 Aug. 20, 2007, Page xli of xliv
REJ09B0395-0400