HD6413008VF25 Datasheet, PDF (308/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

9. 8-Bit Timers
φ
External clock input
8TCNT input clock
8TCNT
N−1
N
N+1
Figure 9.9 Count Timing for External Clock Input (Both-Edge Detection)
9.4.2 Compare Match Timing
Timer Output Timing: When compare match A or B occurs, the timer output is as specified by
the OIS3, OIS2, OS1, and OS0 bits in 8TCSR (unchanged, 0 output, 1 output, or toggle output).
Figure 9.10 shows the timing when the output is set to toggle on compare match A.
φ
Compare match A
signal
Timer output
Figure 9.10 Timing of Timer Output
Rev.4.00 Aug. 20, 2007 Page 262 of 638
REJ09B0395-0400