HD6413008VF25 Datasheet, PDF (473/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

14. A/D Converter
14.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR and the 8-bit
timer's ADTE bit is cleared to 0, external trigger input is enabled at the ADTRG pin. A high-to-
low transition at the ADTRG pin sets the ADST bit to 1 in ADCSR, starting A/D conversion.
Other operations, in both single and scan modes, are the same as if the ADST bit had been set to 1
by software. Figure 14.6 shows the timing.
φ
ADTRG
Internal trigger
signal
ADST
A/D conversion
Figure 14.6 External Trigger Input Timing
14.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.
Rev.4.00 Aug. 20, 2007 Page 427 of 638
REJ09B0395-0400