HD6413008VF25 Datasheet, PDF (341/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

10. Programmable Timing Pattern Controller (TPC)
10.2.9 TPC Output Control Register (TPCR)
TPCR is an 8-bit readable/writable register that selects output trigger signals for TPC outputs on a
group-by-group basis.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
G3CMS1 G3CMS0 G2CMS1 G2CMS0 G1CMS1 G1CMS0 G0CMS1 G0CMS0
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W R/W
R/W
R/W
R/W
Group 3 compare
match select 1 and 0
These bits select
the compare match _{Group 2 compare}
event that triggers _{match select 1 and 0}
TPC output group 3 _{These bits select}
(TP₁₅ to TP₁₂)
the compare match
event that triggers
TPC output group 2
Group 1 compare
match select 1 and 0
These bits select
(TP₁₁ to TP₈)
the compare match
event that triggers
TPC output group 1
(TP₇ to TP₄)
Group 0 compare
match select 1 and 0
These bits select
the compare match
event that triggers
TPC output group 0
(TP₃ to TP₀)
TPCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Rev.4.00 Aug. 20, 2007 Page 295 of 638
REJ09B0395-0400