HD6413008VF25 Datasheet, PDF (642/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
ADCSR—A/D Control/Status Register
H'FFFE8
A/D
Bit
Initial value
Read/Write
7
ADF
0
R/(W)*
6
ADIE
0
R/W
5
ADST
0
R/W
4
SCAN
0
R/W
3
CKS
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
0
CH0
0
R/W
Clock select
Channel select 2 to 0
0 ^{Conversion time =}
Group Selection Channel Selection
Description
134 states (maximum) CH2 CH1 CH0 Single Mode Scan Mode
1 ^{Conversion time =}
70 states (maximum)
00
AN0
1 AN1
0
10
AN2
1 AN3
AN0
AN0, AN1
AN0 to AN2
AN0 to AN3
Scan mode
0 Single mode
1 Scan mode
00
AN4
1 AN5
1
10
AN6
1 AN7
AN4
AN4, AN5
AN4 to AN6
AN4 to AN7
A/D start
0 A/D conversion is stopped
1. Single mode: A/D conversion starts; ADST is automatically cleared to 0 when conversion ends
1 2. Scan mode: A/D conversion starts and continues, cycling among the selected channels ADST
is cleared to 0 by software, by a reset, or by a transition to standby mode
A/D interrupt enable
0 A/D end interrupt request is disabled
1 A/D end interrupt request is enabled
A/D end flag
[Clearing condition]
0 _{Read ADF when ADF = 1, then write 0 in ADF}
1 _{[Setting conditions]}
• Single mode: A/D conversion ends
• Scan mode: A/D conversion ends in all selected channels
Note: * Only 0 can be written to clear the flag.
Rev.4.00 Aug. 20, 2007 Page 596 of 638
REJ09B0395-0400