HD6413008VF25 Datasheet, PDF (641/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
ADDRD H/L—A/D Data Register D H/L
H'FFFE6, H'FFFE7
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Read/Write R R R R R R R R R R R R R R R R
ADDRDH
ADDRDL
A/D
A/D conversion data
10-bit data giving an A/D conversion result
ADCR—A/D Control Register
H'FFFE9
Bit
7
6
5
4
3
2
1
0
TRGE ⎯
⎯
⎯
⎯
⎯
⎯
⎯
Initial value
0
1
1
1
1
1
1
0
Read/Write R/W
⎯
⎯
⎯
⎯
⎯
⎯
R/W
Trigger Enable
A/D conversion start by external trigger or 8-bit timer
0 _{compare match is disabled}
1
A/D conversion is started by falling edge of external
trigger signal (ADTRG) or 8-bit timer compare match
A/D
Rev.4.00 Aug. 20, 2007 Page 595 of 638
REJ09B0395-0400