HD6413008VF25 Datasheet, PDF (177/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

φ
Address bus
CSn
AS
RD
Read access D15 to D8
D7 to D0
HWR
Write access
LWR
D15 to D8
D7 to D0
Bus cycle
T1
T2
6. Bus Controller
Odd external address in area n
High
Invalid
Valid
Undetermined data
Valid
Note: n = 7 to 0
Figure 6.15 Bus Control Signal Timing for 16-Bit, Two-State-Access Area (2)
(Byte Access to Odd Address)
Rev.4.00 Aug. 20, 2007 Page 131 of 638
REJ09B0395-0400