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HD6413008VF25 Datasheet, PDF (220/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
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7. I/O Ports
Port B Data Register (PBDR): PBDR is an 8-bit readable/writable register that stores output data
for pins port B. When port B functions as an output port, the value of this register is output. When
a bit in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is returned.
When a bit in PBDDR is cleared to 0, if port B is read the corresponding pin logic level is read.
Bit
Initial value
Read/Write
7
PB 7
0
R/W
6
PB 6
0
R/W
5
PB 5
0
R/W
4
PB 4
0
R/W
3
PB 3
0
R/W
2
PB 2
0
R/W
1
PB 1
0
R/W
0
PB 0
0
R/W
Port B data 7 to 0
These bits store data for port B pins
PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev.4.00 Aug. 20, 2007 Page 174 of 638
REJ09B0395-0400
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