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HD6413008VF25 Datasheet, PDF (530/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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19. Electrical Characteristics
Condition
A
B and C
Module Item
Symbol Min Max Min Max Unit
SCI Input clock Asynchronous t
4
â¯
Scyc
cycle
Synchronous
6
â¯
4
â¯t
cyc
6
â¯
tcyc
Input clock rise time
tSCKr
⯠1.5
â¯
1.5 tcyc
Input clock fall time
tSCKf
⯠1.5
â¯
1.5 tcyc
Input clock pulse width
t
SCKW
0.4 0.6
0.4 0.6 t
Scyc
Transmit data delay time
t
⯠100 ⯠100 ns
TXD
Receive data setup time
(synchronous)
tRXS
100 â¯
100 ⯠ns
Receive data Clock input tRXH
hold time
Clock output
(synchronous)
100 â¯
0
â¯
100 ⯠ns
0
⯠ns
Test
Conditions
Figure 19.14
Figure 19.15
Chip output pin
C
RL
C = 90 pF: ports 4, 6, 8, A19 to A0, D15 to D8
C = 30 pF: ports 9, A, B, RESO
RL = 2.4 k Ω
RH = 12 kΩ
RH
Input/output timing measurement levels
⢠Low: 0.8 V
⢠High: 2.0 V
Figure 19.2 Output Load Circuit
Rev.4.00 Aug. 20, 2007 Page 484 of 638
REJ09B0395-0400
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