HD6413008VF25 Datasheet, PDF (377/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

12. Serial Communication Interface
Bit 2—Multiprocessor Mode (MP): Selects a multiprocessor format. When a multiprocessor
format is selected, parity settings made by the PE and O/E bits are ignored. The MP bit setting is
valid only in asynchronous mode. It is ignored in synchronous mode.
For further information on the multiprocessor communication function, see section 12.3.3,
Multiprocessor Communication.
Bit 2
MP
0
1
Description
Multiprocessor function disabled
Multiprocessor format selected
(Initial value)
Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): These bits select the clock source for the on-
chip baud rate generator. Four clock sources can be selected by the CKS1 and CKS0 bits: φ, φ/4,
φ/16, and φ/64.
For the relationship between the clock source, bit rate register setting, and baud rate, see section
12.2.8, Bit Rate Register (BRR).
Bit 1
CKS1
0
0
1
1
Bit 0
CKS0
0
1
0
1
Description
φ
φ/4
φ/16
φ/64
(Initial value)
Rev.4.00 Aug. 20, 2007 Page 331 of 638
REJ09B0395-0400