HD6413008VF25 Datasheet, PDF (343/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

10. Programmable Timing Pattern Controller (TPC)
Bits 3 and 2—Group 1 Compare Match Select 1 and 0 (G1CMS1, G1CMS0): These bits
select the compare match event that triggers TPC output group 1 (TP₇ to TP₄).
Bit 3
G1CMS1
0
1
Bit 2
G1CMS0
0
1
0
1
Description
TPC output group 1 (TP₇ to TP₄) is triggered by compare match in 16-bit
timer channel 0
TPC output group 1 (TP to TP ) is triggered by compare match in 16-bit
7
4
timer channel 1
TPC output group 1 (TP₇ to TP₄) is triggered by compare match in 16-bit
timer channel 2
TPC output group 1 (TP₇ to TP₄) is triggered by
compare match in 16-bit timer channel 2
(Initial value)
Bits 1 and 0—Group 0 Compare Match Select 1 and 0 (G0CMS1, G0CMS0): These bits
select the compare match event that triggers TPC output group 0 (TP₃ to TP₀).
Bit 1
G0CMS1
0
1
Bit 0
G0CMS0
0
1
0
1
Description
TPC output group 0 (TP₃ to TP₀) is triggered by compare match in 16-bit
timer channel 0
TPC output group 0 (TP₃ to TP₀) is triggered by compare match in 16-bit
timer channel 1
TPC output group 0 (TP to TP ) is triggered by compare match in 16-bit
3
0
timer channel 2
TPC output group 0 (TP₃ to TP₀) is triggered by
compare match in 16-bit timer channel 2
(Initial value)
Rev.4.00 Aug. 20, 2007 Page 297 of 638
REJ09B0395-0400