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HD6413008VF25 Datasheet, PDF (366/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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11. Watchdog Timer
11.4 Interrupts
During interval timer operation, an overflow generates an interval timer interrupt (WOVI). The
interval timer interrupt is requested whenever the OVF flag is set to 1 in TCSR.
11.5 Usage Notes
Contention between TCNT Write and Increment: If a timer counter clock pulse is generated
during the T3 state of a write cycle to TCNT, the write takes priority and the timer count is not
incremented. See figure 11.8.
CPU: TCNT write cycle
T1
T2
T3
Ï
TCNT
Internal write
signal
TCNT input
clock
TCNT
N
M
Counter write data
Figure 11.8 Contention between TCNT Write and Count up
Changing CKS2 to CKS0 Bit: Halt TCNT by clearing the TME bit to 0 in TCSR before
changing the values of bits CKS2 to CKS0.
Rev.4.00 Aug. 20, 2007 Page 320 of 638
REJ09B0395-0400
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