HD6413008VF25 Datasheet, PDF (161/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

6. Bus Controller
6.2.7 Address Control Register (ADRCR)
ADRCR is an 8-bit readable/writable register that selects either address update mode 1 or address
update mode 2 as the address output method.
Bit
7
6
5
4
3
2
1
0
⎯
⎯
⎯
⎯
⎯
⎯
⎯
ADRCTL
Initial value
1
1
1
1
1
1
1
1
Read/Write
⎯
⎯
⎯
⎯
⎯
⎯
⎯
R/W
Reserved bits
Address control
Selects address
update mode 1 or
address update
mode 2
ADRCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 1—Reserved: Read-only bits, always read as 1.
Bit 0—Address Control (ADRCTL): Selects the address output method.
Bit 0
ADRCTL
0
1
Description
Address update mode 2 is selected
Address update mode 1 is selected
(Initial value)
Rev.4.00 Aug. 20, 2007 Page 115 of 638
REJ09B0395-0400